问一个奇怪的问题啊# EB23 - 劳工卡
h*3
1 楼
The company is a very stable fabless company. The company offers
comprehensive package including competitive base salary, annual bonus and
RSU grants. The position is in San Jose, CA.
PM me if you are interested.
Staff Engineer, Video Architecture/Modeling
RESPONSIBILITIES
- Develop architecture for the hardware implementation of video codec,
including H.264, VP8 and new H.265/HEVC
- Design, implement and maintain video codec functional models for the
hardware implementation
- Support hardware team for RTL implementation
- Support firmware team for firmware development, debug and integration
- Develop tests and test plan to verify the correctness of the hardware
design
REQUIREMENTS
- BS/MS/PHD in EE, CS or CE with 5+ years of experiences with architecture
and/or modeling
- Language: C/C++, scripting language
- Thorough knowledge of video standards such as H.264 and/or VP8
- Knowledge of new H.265/HEVC standard a big plus
- Experience of SystemC, Verilog/SystemVerilog a plus
- Experience and understanding of MIPS and/or ARM CPU architecture a plus
comprehensive package including competitive base salary, annual bonus and
RSU grants. The position is in San Jose, CA.
PM me if you are interested.
Staff Engineer, Video Architecture/Modeling
RESPONSIBILITIES
- Develop architecture for the hardware implementation of video codec,
including H.264, VP8 and new H.265/HEVC
- Design, implement and maintain video codec functional models for the
hardware implementation
- Support hardware team for RTL implementation
- Support firmware team for firmware development, debug and integration
- Develop tests and test plan to verify the correctness of the hardware
design
REQUIREMENTS
- BS/MS/PHD in EE, CS or CE with 5+ years of experiences with architecture
and/or modeling
- Language: C/C++, scripting language
- Thorough knowledge of video standards such as H.264 and/or VP8
- Knowledge of new H.265/HEVC standard a big plus
- Experience of SystemC, Verilog/SystemVerilog a plus
- Experience and understanding of MIPS and/or ARM CPU architecture a plus