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Job Posting: Feb 14, 2011
Primary Location: US-TX-Austin-Oak Hill (TX30)
Job: IC Design
Education Level: Bachelor's Degree
Job Type: Recent Graduate
Expectations include:
Verification planning;
Verification test bench infrastructure and environment development and
implementation;
Development of verification testbench components such as drivers, monitors,
response checkers;
Development of direct and constrained-random stimulus;
Understands and analyzes RTL code coverage results;
Understands functional coverage methods;
Understands and develops system verilog assertions;
Understands and implements formal verification methods;
Applicant should have efficient debugging skills and familiarity with major
debug tool vendors.
Qualifications:
C/C++;
Assembly Language Programming skills, such as PPC
VHDL/Verilog/System Verilog
OVM/UVM
Class Based verification methodologies
Formal verification methodologies
Microcontroller Pattern Debugging and Testing
