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招hardware engineer和design verification engineer (转载)
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招hardware engineer和design verification engineer (转载)# EE - 电子工程
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【 以下文字转载自 CS 讨论区 】
发信人: gujason (gujason), 信区: CS
标 题: SUTD-MIT Postdoctoral Programme
发信站: BBS 未名空间站 (Fri May 13 11:41:32 2011, 美东)
The Massachusetts Institute of Technology (MIT) in collaboration with the
Singapore University of Technology and Design (SUTD) is seeking to hire 5-10
postdoctoral fellows for a special two-year program that includes one year
of postdoctoral work at MIT and one year at the Singapore University of
Technology and Design in Singapore. The SUTD-MIT Postdoctoral Programme
offers unique research opportunities to highly talented international
individuals to engage in new or on-going research programs at MIT and SUTD.
These two-year appointments are competitive and are designed to advance MIT
’s and SUTD's postdoctoral research environment in technology, architecture
, engineering, manufacturing, and systems design. Although the post-docs
would be jointly recruited and supervised, in terms of official appointments
, they will be SUTD post docs and spend a year at MIT as visitors.
Postdoctoral fellows may also be considered for tenure-track faculty
appointments within SUTD.
The application deadline for the first intake of postdoctoral fellows is
June 15, 2011.
Eligibility and Conditions
• The fellow must have completed the requirements for a PhD or an
equivalent doctorate degree before beginning the programme.
• Each award is for a 24-month period, where the first year (12
months) is spent in MIT, USA, and the second year (12 months) in SUTD,
Singapore. (First intake expected to start September 1, 2011)
• Fellows are also expected to meet regularly with their faculty
advisors in SUTD and MIT, and must devote their efforts entirely to the
research for which the award was made.
• Fellows will have teaching commitments and such commitments shall
be limited to developing new graduate classes at SUTD and/or assisting
teaching in SUTD’s undergraduate programmes.
Targeted Research Areas
Postdoctoral applicants are encouraged to send in their research proposals
in the following areas:
• Transportation
• Wireless/Sensor networks
• Robotics
Priority for selection will be given to applicants whose proposed research
is particularly interdisciplinary and/or innovative. Research involving two
or more MIT/SUTD research groups will also be given priority for selection,
as will research that broadens the activities of the MIT/SUTD groups
involved. Research proposals that incrementally extend on-going MIT/SUTD
projects will be given lower selection priority.
For more information and complete guidelines, contact: j*****[email protected]
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【 以下文字转载自 JobHunting 讨论区 】
发信人: cicicecilia (cicicecilia), 信区: JobHunting
标 题: 招hardware engineer和design verification engineer (转载)
发信站: BBS 未名空间站 (Wed Jun 20 18:02:18 2018, 美东)
发信人: cicicecilia (cicicecilia), 信区: EE
标 题: 招hardware engineer和design verification engineer
发信站: BBS 未名空间站 (Wed Jun 20 17:58:57 2018, 美东)
这两个职位都需要有经验,地点在南加州Aliso Viejo,或者有什么canidate推荐的也
欢迎。hardware这个职位最好可以会说中文。具体的可以看网页:
http://www.indiesemi.com/careers/
Senior Staff Hardware Development Engineer - Job code #077
Job Overview:
We are looking for a Hardware engineer. The successful candidate will be
responsible for defining, designing and managing the production and test
quality of evaluation and application related boards in close cooperation
with the IC design, test and application teams. This position reports to
indie’s VP of Engineering.
Job Summary:
• Design evaluation and reference hardware designs involving a wide
range of applications including RF (Bluetooth, WIFI), advanced sensing
elements and power features to name a few.
• Manage the generation and control quality of all the customer
facing documentation associated with indie product portfolio.
• Hand on experience to draw PCB schematic and layout.
• Interface with SW Systems, QA and IC engineering teams
• Review customer board designs and assisting in their evaluation
and bring up.
Main Requirements:
• 5+ years of experience in a similar position.
• MS degree in Electrical and/or Computer Engineering
• Excellent understanding of board design and tools, including RF
design, Microcontroller subsystems, analog circuits and power converters.
• Debug skills and ability to oversee the PCB layout process is a
must
• RF and antenna knowledge is a plus.
• Experience using Allegro and Altium tool suite
• Competent using spectrum analyzers, oscilloscopes and signal
analyzers.
• Must be a self-starter and must be able to work independently and
in a team environment.
• Excellent verbal and written communication skills.
Geography:
Job opportunity open to our Aliso Viejo CA office.
Senior Staff Design Validation and Test Engineer - Job Code #075
Job Overview:
We are currently looking for a Design Validation and Test (DVT) engineer. An
ideal candidate should have deep and solid understanding on basic EE
concepts and can apply them in real life lab work. The successful candidate
will be responsible for defining and executing the validation plans for new
semiconductor products at IP (in situ characterization) and system levels.
Close collaboration with design team is encouraged as our IC designers do
spend time in the lab!
Job Summary:
• Validate indie’s ICs functionality in the lab against design and
application requirements. Tasks includes test plan and procedure generation
, initial chip bring up, full IP and chip level validation and
characterization over process and temperature and debug analysis while
product is in development stage.
• Define and develop the test setups with reasonable tradeoffs
between accuracy, measurement time, and cost.
• Develop automation software for the tests using LabView or Python
preferably.
• Design hardware fixtures, e.g. a PCB, as a part of the test setup
if no off-the-shelf solution is available.
• Collect, consolidate and analyze test data for review with the
design and quality teams.
• Participate to board and chip design reviews to make sure all the
parameters can be tested. Help implement design features for testing and
automation purposes.
Main Requirements:
• 5+ years of experience in a similar position.
• MS degree in Electrical and/or Computer Engineering
• Have a solid foundation on basic circuit and demonstrated good
understanding on basic analog circuits on areas like transistors, Op Amp,
ADC, DAC, oscillator and clock. RF knowledge is a definitive plus as indie
develops Bluetooth and WIFI solutions.
• Proficient at using various bench test bench equipment such as
DMM, power supply, oscilloscope, spectrum analyzer, signal generator and VNA
• Hands on capability to design and implement EDVT characterization
tests with solid understanding of hardware design and manufacturing test
parameters. Familiar with concepts such as spec compliance matrix.
• Enjoy debugging as well as inventing more efficient ways to test
indie’s ICs
• Comfortable with MCU based systems and FW development tool chain.
• Hands on capability to develop and implement test scripts using C
, C++, LabView and Python programming.
• Be systematic and very well organized, excellent communication
skills as we do have offices in UK, Austin and California with FAE presence
in Asia.
Geography:
Job opportunity open to our Aliso Viejo CA office.
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