C*g
2 楼
Maybe the simulator can not faithfully represent the real condition.
【在 c*******l 的大作中提到】
: 一直不是很理解，为什么G>1, phase =-180，还不震荡。。。
【在 c*******l 的大作中提到】
: 一直不是很理解，为什么G>1, phase =-180，还不震荡。。。
c*r
3 楼
what kind of simulation did you do? ac-simulation or transient simulation?
Normally in analog design, we don't trust the result of ac-simulation
because the model may not be accurate. We are more reliable on transient
simulation result.
Meanwhile, open-loop-gain>1 is not necessary for oscillating. You have to
check the close-loop-gain (with the influence of parasitic cap in your input
stage). You can do it like this: add a 10G inductance to break the ac-loop
of feedback, and add a 10G cap to bre
Normally in analog design, we don't trust the result of ac-simulation
because the model may not be accurate. We are more reliable on transient
simulation result.
Meanwhile, open-loop-gain>1 is not necessary for oscillating. You have to
check the close-loop-gain (with the influence of parasitic cap in your input
stage). You can do it like this: add a 10G inductance to break the ac-loop
of feedback, and add a 10G cap to bre
T*n
4 楼
你是原来贴NCSU找工作那位？
input
loop
【在 c********r 的大作中提到】
: what kind of simulation did you do? ac-simulation or transient simulation?
: Normally in analog design, we don't trust the result of ac-simulation
: because the model may not be accurate. We are more reliable on transient
: simulation result.
: Meanwhile, open-loop-gain>1 is not necessary for oscillating. You have to
: check the close-loop-gain (with the influence of parasitic cap in your input
: stage). You can do it like this: add a 10G inductance to break the ac-loop
: of feedback, and add a 10G cap to bre
input
loop
【在 c********r 的大作中提到】
: what kind of simulation did you do? ac-simulation or transient simulation?
: Normally in analog design, we don't trust the result of ac-simulation
: because the model may not be accurate. We are more reliable on transient
: simulation result.
: Meanwhile, open-loop-gain>1 is not necessary for oscillating. You have to
: check the close-loop-gain (with the influence of parasitic cap in your input
: stage). You can do it like this: add a 10G inductance to break the ac-loop
: of feedback, and add a 10G cap to bre
c*r
5 楼
No, not me, but I know that person, I taught him a lot.
你是原来贴NCSU找工作那位？
你是原来贴NCSU找工作那位？
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