Apple ASIC DFT DV 招人# JobHunting - 待字闺中
b*s
1 楼
Apple（我所在的组）招 ASIC DFT/DV Engineer.
非常希望国人加入！如果感兴趣请发简历至 [email protected]/* */ 简历楼主会筛选
一下，如果没问题可以直接递给hiring manager.
Key Qualifications
The ideal candidate will have 3+ years of DFT DV experience, leading DFT DV
efforts for large processor and/or SOC designs
The ideal candidate will have relevant experience including: MBIST, ATPG,
JTAG, 1500.
Experience with verification language such as SystemVerilog is a plus
Experience with Verilog is a plus
Knowledge of IEEE 1500/IEEE 1149
Experience with Verdi and debugging problems with waves.
Experience defining coverage space, writing coverage model, analyzing
results
Experience working under strict schedule deadlines with the ability to
manage multiple priorities
Experience with Perl, Shell scripting, Makefiles, TCL a plus
Excellent communication skills and ability to collaborate
非常希望国人加入！如果感兴趣请发简历至 [email protected]/* */ 简历楼主会筛选
一下，如果没问题可以直接递给hiring manager.
Key Qualifications
The ideal candidate will have 3+ years of DFT DV experience, leading DFT DV
efforts for large processor and/or SOC designs
The ideal candidate will have relevant experience including: MBIST, ATPG,
JTAG, 1500.
Experience with verification language such as SystemVerilog is a plus
Experience with Verilog is a plus
Knowledge of IEEE 1500/IEEE 1149
Experience with Verdi and debugging problems with waves.
Experience defining coverage space, writing coverage model, analyzing
results
Experience working under strict schedule deadlines with the ability to
manage multiple priorities
Experience with Perl, Shell scripting, Makefiles, TCL a plus
Excellent communication skills and ability to collaborate