Analog/RF CMOS IC Design 面试中的常见问题（转载）# JobHunting - 待字闺中
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总想把我找工作和面试时的那些常见技术问题总结出来, 给以后的中国同学找类似工作
时一个参考.
前段时间我一直很忙, 没能抽出时间. 今天有空就写了一下. 都是我五次面试时的每次
必问的问题:
1.两级运放中的必考问题:
(1). Bode-plot, Phase-margin and Frequency Compensation in Two-stage Op-Amp
(2). Gain-splitting using miller-capacitor in Frequency compensation
(3). Where is the dominal pole? estimate the magnitude of dominal pole and
other poles if have
(4). If the first stage is telescope or folded-cascode, estimate its max
swing, headroom
(5). When used as unity-gain buffer, es
时一个参考.
前段时间我一直很忙, 没能抽出时间. 今天有空就写了一下. 都是我五次面试时的每次
必问的问题:
1.两级运放中的必考问题:
(1). Bode-plot, Phase-margin and Frequency Compensation in Two-stage Op-Amp
(2). Gain-splitting using miller-capacitor in Frequency compensation
(3). Where is the dominal pole? estimate the magnitude of dominal pole and
other poles if have
(4). If the first stage is telescope or folded-cascode, estimate its max
swing, headroom
(5). When used as unity-gain buffer, es