We have an immediate need for a Digital Design Verification Engineer to write and modify RTL code, perform synthesis and verification for an Embedded Microcontroller Sub-System in a Test-Chip for a High-Speed DDR PHY Interface. The assignment will also involve supporting board-level diagnostics, test and data collection [ATE and Lab Characterization]. The consultant will work closely with the PHY Design Team, the Test-Chip Physical Implementation Team, Package and Board-Designers, and with Signal Integrity Engineers, to ensure first-pass silicon success. Job Requirements: MSEE + a minimum of 5 years of relevant experience in Digital Logic Design and Verification Must possess extensive previous experience with High-Performance SoC Design in Deep Sub-Micron Technology Nodes. Strong preference for candidates having prior experience with Memory Controllers, the AMBA Bus Protocol, and external peripheral-support. Strong preference for candidates possessing prior experience with the DDR PHY Interface [DFI] and DDR PHY Digital Design.
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【 以下文字转载自 Military 讨论区 】 发信人: lsunspot (小手), 信区: Military 标 题: Re: 英文里有一个形象的词cut corners 发信站: BBS 未名空间站 (Thu Jan 12 10:20:30 2017, 美东) 不是抄近路?