USCIS新update的processing time什么情况？# EB23 - 劳工卡
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中型上市公司(NASDAQ:OVTI) 组里在招人,可以内部推荐。如有意者请站内信件联系。
以下是job description:
Responsibilities:
Primary (80%)
• work on video and related function’s algorithm and work with
hardware designer to implement it in IC design
• Provide hardware architecture and micro architecture for RTL
designer
• involve in detail RTL design environment setup that provides test
cases to verify its architecture and algorithm
• Join the innovation discussion to come up with new ideas in multi-
media chip design
Secondary (20%)
• review current algorithms in video and image and try to improve or
modify their quality
• Assist embedded FW development
• generate patents that are related to the work
Requirements:
MSEE/CE with 8+ years of industry experience (or phD with 5 years
working experiences)
Strong analytical, and problem solving skills, as well as hands-on
design skills
Good knowledge of H.264 video encode/decode algorithm, capable of
implement algorithm into architecture and optimized into hardware
implementation
Able to write C/C++ code to generate test case for functional
verification
Knowledge in languages that relevant to the ASIC development
process including Verilog, Unix Scripting, Perl, and TCL
ISP function algorithm and implementation experience is a plus
Self-motivated, excellent communication skills and ability to
excel in a team environment.
以下是job description:
Responsibilities:
Primary (80%)
• work on video and related function’s algorithm and work with
hardware designer to implement it in IC design
• Provide hardware architecture and micro architecture for RTL
designer
• involve in detail RTL design environment setup that provides test
cases to verify its architecture and algorithm
• Join the innovation discussion to come up with new ideas in multi-
media chip design
Secondary (20%)
• review current algorithms in video and image and try to improve or
modify their quality
• Assist embedded FW development
• generate patents that are related to the work
Requirements:
MSEE/CE with 8+ years of industry experience (or phD with 5 years
working experiences)
Strong analytical, and problem solving skills, as well as hands-on
design skills
Good knowledge of H.264 video encode/decode algorithm, capable of
implement algorithm into architecture and optimized into hardware
implementation
Able to write C/C++ code to generate test case for functional
verification
Knowledge in languages that relevant to the ASIC development
process including Verilog, Unix Scripting, Perl, and TCL
ISP function algorithm and implementation experience is a plus
Self-motivated, excellent communication skills and ability to
excel in a team environment.
