VerilogA problem# EE - 电子工程
c*g
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We have a few openings at our San Jose office. If you are interested (or
your friends may be interested), please feel free to send your resumes to :
c**********[email protected]
Thank you very much
Company: MediaTek USA, Inc
Job position: multiple ASIC architecture, system modeling, Design engineer(
DE) engineering positions available from mid to senior level.
Job titles: Staff Engineer, Technical Manager.
Job Requirements:
- Minimum 5 years of ASIC Design experience with BSEE or MSEE degree
- Experienced ASIC Architecture/design expert to define next
generation data center ASIC starting from system modeling, architecture
definition to micro-architecture definition. Familiar with data center
protocol and ASIC design is a plus.
- Proficient in HVL(hardware verification language) such as System
Verilog, Verilog, System C.
- Knowledge and background in networking protocols such as Ethernet
, TRILL, MPLS/VPLS, VxLAN/NVGRE are preferred.
- Experience on networking IC design is preferred, especially
ethernet switch, traffic manager, VoQ, switch fabric and memory sub system
projects
your friends may be interested), please feel free to send your resumes to :
c**********[email protected]
Thank you very much
Company: MediaTek USA, Inc
Job position: multiple ASIC architecture, system modeling, Design engineer(
DE) engineering positions available from mid to senior level.
Job titles: Staff Engineer, Technical Manager.
Job Requirements:
- Minimum 5 years of ASIC Design experience with BSEE or MSEE degree
- Experienced ASIC Architecture/design expert to define next
generation data center ASIC starting from system modeling, architecture
definition to micro-architecture definition. Familiar with data center
protocol and ASIC design is a plus.
- Proficient in HVL(hardware verification language) such as System
Verilog, Verilog, System C.
- Knowledge and background in networking protocols such as Ethernet
, TRILL, MPLS/VPLS, VxLAN/NVGRE are preferred.
- Experience on networking IC design is preferred, especially
ethernet switch, traffic manager, VoQ, switch fabric and memory sub system
projects
