Hiring: Modeling Engineer# JobHunting - 待字闺中
h*3
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The company is a very stable fabless company. The company offers
comprehensive package including competitive base salary, annual bonus and/or
RSU grants. The position is in San Jose, CA.
PM me if you are interested.
Sr. Engineer, Video Architecture/Modeling
RESPONSIBILITIES
- Develop architecture for the hardware implementation of video codec,
including H.264, VP8 and new H.265/HEVC
- Design, implement and maintain video codec functional models for the
hardware implementation
- Support hardware team for RTL implementation
- Support firmware team for firmware development, debug and integration
- Develop tests and test plan to verify the correctness of the hardware
design
REQUIREMENTS
- BS/MS/PHD in EE, CS or CE with 2+ years of experiences with architecture
and/or modeling
- Language: C/C++, scripting language
- Thorough knowledge of video standards such as H.264 and/or VP8
- Knowledge of new H.265/HEVC standard a big plus
- Experience of SystemC, Verilog/SystemVerilog a plus
- Experience and understanding of MIPS and/or ARM CPU architecture a plus
comprehensive package including competitive base salary, annual bonus and/or
RSU grants. The position is in San Jose, CA.
PM me if you are interested.
Sr. Engineer, Video Architecture/Modeling
RESPONSIBILITIES
- Develop architecture for the hardware implementation of video codec,
including H.264, VP8 and new H.265/HEVC
- Design, implement and maintain video codec functional models for the
hardware implementation
- Support hardware team for RTL implementation
- Support firmware team for firmware development, debug and integration
- Develop tests and test plan to verify the correctness of the hardware
design
REQUIREMENTS
- BS/MS/PHD in EE, CS or CE with 2+ years of experiences with architecture
and/or modeling
- Language: C/C++, scripting language
- Thorough knowledge of video standards such as H.264 and/or VP8
- Knowledge of new H.265/HEVC standard a big plus
- Experience of SystemC, Verilog/SystemVerilog a plus
- Experience and understanding of MIPS and/or ARM CPU architecture a plus