h*n
2 楼
吼一声~~
都出来活动活动?
faculty生活之孤独和奋斗
都出来活动活动?
faculty生活之孤独和奋斗
A*m
3 楼
从蓝光影碟机到音响
我在newegg买过一个sony的蓝光机,s185,花了40才,用的跟新的差不多,但买回来可
以看出来是旧的而不是新的
不知道newegg哪来的那么多sony产品,而且似乎还不是sony官方refurb的
我在newegg买过一个sony的蓝光机,s185,花了40才,用的跟新的差不多,但买回来可
以看出来是旧的而不是新的
不知道newegg哪来的那么多sony产品,而且似乎还不是sony官方refurb的
j*o
4 楼
谢谢!
p*g
5 楼
原来GV里是手机,搞了一个gizmo5,把gizmo5的SIP号加进去,认证也通过了。可在计
算机上用GV打电话,还是要我通过手机转接,gizmo一点动静都没有。看setting里,我
选的“forward to”是gizmo5。这个问题如何解决?谢谢
算机上用GV打电话,还是要我通过手机转接,gizmo一点动静都没有。看setting里,我
选的“forward to”是gizmo5。这个问题如何解决?谢谢
z*k
6 楼
大家好,
我在这里给大家来个长期内推,软件硬件都可以。但我本身team里做ASIC BE的,如果
我见到合适的简历会直接塞给hiring manager。
[Intel full-time] 内推。职位请见http://jobs.intel.com/。
请附上想要申请的【简历*1】+【job ID/job title(可多个)】 +【 第三人称自我介
绍】发送至[email protected]。内推成功后,也可以自己去添加还想申请的职
位。
【12月内被内推过的无法重复内推,谢谢】
我会看你简历,如果我推了,会回复各位的。如果我没回复,可能是你的简历需要修改
了。
我在这里给大家来个长期内推,软件硬件都可以。但我本身team里做ASIC BE的,如果
我见到合适的简历会直接塞给hiring manager。
[Intel full-time] 内推。职位请见http://jobs.intel.com/。
请附上想要申请的【简历*1】+【job ID/job title(可多个)】 +【 第三人称自我介
绍】发送至[email protected]。内推成功后,也可以自己去添加还想申请的职
位。
【12月内被内推过的无法重复内推,谢谢】
我会看你简历,如果我推了,会回复各位的。如果我没回复,可能是你的简历需要修改
了。
m*f
9 楼
不要。难道你要分裂中国?
h*t
10 楼
你的认证怎么通过的呢?
z*k
11 楼
已经收到一些同学的简历,我已陆续开始帮你们推。
d*n
14 楼
看到别人签经说,VO问去过哪里,父母说去过香港,还拿港澳通行证给Vo看.
s*n
16 楼
赞lz一个
f*e
17 楼
most of them are students and postdoc. work like a dog.
p*g
18 楼
原来是个傻问题,我没有把ring to phone改过来。:)!
l*y
19 楼
楼主太棒了 一定要表扬
u*s
21 楼
ring to phone and forward are too independent settings
z*k
22 楼
总结一下
1. 一年内已被intel 系统内推过的别再重复发简历过来了。
2. 还有一年才毕业的,现在投fulltime简历似乎早了一点
3. Intel 的software 岗位比较少
1. 一年内已被intel 系统内推过的别再重复发简历过来了。
2. 还有一年才毕业的,现在投fulltime简历似乎早了一点
3. Intel 的software 岗位比较少
z*k
25 楼
Memory组招人
In this position, you will be working as a member of the Non-Volatile Memory
(NVM) Solutions Group's (NSG's) Technology Development Quality and
Reliability (TD Q&R) team, helping to develop new state-of-the-art Intel NVM
technologies and SSD products - focusing on NVM array reliability:
degradation of key array parameters due to program and/or erase cycling, and
various data retention and/or disturb mechanisms. The work will involve
activities such as designing and executing experiments to characterize NVM
array reliability mechanisms, physical (device physics based) and empirical
reliability modeling, field failure rate estimation, and help develop design
and/or process and/or product and/or test solutions in order to enable
aggressively scaling of the Intel's NVM technologies, including exploration
of novel memory cells. You will be expected to lead small cross-functional
groups of engineers on technical projects. You must possess the below
minimum qualifications to be initially considered for this position.
Preferred qualifications are in addition to the minimum requirements and are
considered a plus factor in identifying top candidates. Experience listed
below would be obtained through a combination of your school work/classes/
research and/or relevant previous job and/or internship experiences.
Minimum Qualifications: The candidate must possess a Master of Science or Ph
.D. degree in Electrical Engineering, Computer Engineering, Materials
Science, Physics or Information Systems. Candidate must have 6 months of
work or educational experience in the following:
• Semiconductor device physics, materials properties, probability and
statistics, electrical circuits, semiconductor processing, and quantum
physics
• Experience in hands-on experimental design, execution, analysis,
interpretation and synthesis
• Programming (C or C and PERL or Python)
Preferred Qualifications:
• Prior Intel Intern or Scholarship recipient
• non-volatile memories, especially product or reliability
• Imaging and analytical lab test equipment such as Logic analyzer/
oscilloscopes, semiconductor parametric analyzer (CV-IV), memory testers.
• Reliability failure statistics, physics, or failure mechanisms.
• CMOS transistor level circuit design, semiconductor device physics,
memory reliability, interconnect reliability, computer or digital systems,
or board level design.
• Statistical analysis packages (e.g. JMP or Minitab)
• Computer programming for testing, preferably of memories , and data
acquisition, reduction and analysis
• Semiconductor fabrication process, packaging assembly, and/or board
system technology operations
In this position, you will be working as a member of the Non-Volatile Memory
(NVM) Solutions Group's (NSG's) Technology Development Quality and
Reliability (TD Q&R) team, helping to develop new state-of-the-art Intel NVM
technologies and SSD products - focusing on NVM array reliability:
degradation of key array parameters due to program and/or erase cycling, and
various data retention and/or disturb mechanisms. The work will involve
activities such as designing and executing experiments to characterize NVM
array reliability mechanisms, physical (device physics based) and empirical
reliability modeling, field failure rate estimation, and help develop design
and/or process and/or product and/or test solutions in order to enable
aggressively scaling of the Intel's NVM technologies, including exploration
of novel memory cells. You will be expected to lead small cross-functional
groups of engineers on technical projects. You must possess the below
minimum qualifications to be initially considered for this position.
Preferred qualifications are in addition to the minimum requirements and are
considered a plus factor in identifying top candidates. Experience listed
below would be obtained through a combination of your school work/classes/
research and/or relevant previous job and/or internship experiences.
Minimum Qualifications: The candidate must possess a Master of Science or Ph
.D. degree in Electrical Engineering, Computer Engineering, Materials
Science, Physics or Information Systems. Candidate must have 6 months of
work or educational experience in the following:
• Semiconductor device physics, materials properties, probability and
statistics, electrical circuits, semiconductor processing, and quantum
physics
• Experience in hands-on experimental design, execution, analysis,
interpretation and synthesis
• Programming (C or C and PERL or Python)
Preferred Qualifications:
• Prior Intel Intern or Scholarship recipient
• non-volatile memories, especially product or reliability
• Imaging and analytical lab test equipment such as Logic analyzer/
oscilloscopes, semiconductor parametric analyzer (CV-IV), memory testers.
• Reliability failure statistics, physics, or failure mechanisms.
• CMOS transistor level circuit design, semiconductor device physics,
memory reliability, interconnect reliability, computer or digital systems,
or board level design.
• Statistical analysis packages (e.g. JMP or Minitab)
• Computer programming for testing, preferably of memories , and data
acquisition, reduction and analysis
• Semiconductor fabrication process, packaging assembly, and/or board
system technology operations
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